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NTLJS4114N Power MOSFET
Features
30 V, 7.8 A, mCoolt Single N-Channel, 2x2 mm WDFN Package
* WDFN Package Provides Exposed Drain Pad for Excellent Thermal * * * * *
Conduction 2x2 mm Footprint Same as SC-88 Lowest RDS(on) in 2x2 mm Package 1.8 V RDS(on) Rating for Operation at Low Voltage Logic Level Gate Drive Low Profile (< 0.8 mm) for Easy Fit in Thin Environments This is a Pb-Free Device
V(BR)DSS
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RDS(on) MAX 35 mW @ 4.5 V 30 V 45 mW @ 2.5 V 55 mW @ 1.8 V S 7.8 A ID MAX (Note 1)
Applications
* DC-DC Conversion * Boost Circuits for LED Backlights * Optimized for Battery and Load Management Applications in
Portable Equipment such as, Cell Phones, PDA's, Media Players, etc.
G
* Low Side Load Switch for Noisy Environment
MAXIMUM RATINGS (TJ = 25C unless otherwise noted)
Parameter Drain-to-Source Voltage Gate-to-Source Voltage Continuous Drain Current (Note 1) Steady State t5s Power Dissipation (Note 1) Steady State t5s Continuous Drain Current (Note 2) Power Dissipation (Note 2) Pulsed Drain Current TA = 25C Steady State TA = 85C TA = 25C tp = 10 ms PD IDM TJ, TSTG IS TL ID TA = 25C TA = 85C TA = 25C PD TA = 25C 3.3 3.6 2.6 0.70 28 -55 to 150 3.0 260 W D A C A C G 3 2 A D 1 Symbol VDSS VGS ID Value 30 12 6.0 4.4 7.8 1.92 W Unit V V A Pin 1 S D
D N-CHANNEL MOSFET
MARKING DIAGRAM
1 2 3 6 JA M G 5 G 4
WDFN6 CASE 506AP STYLE 1
JA = Specific Device Code M = Date Code G = Pb-Free Package (Note: Microdot may be in either location)
PIN CONNECTIONS
6 5 4 D D S
D S (Top View)
Operating Junction and Storage Temperature Source Current (Body Diode) (Note 2) Lead Temperature for Soldering Purposes (1/8 from case for 10 s)
ORDERING INFORMATION
Device NTLJS4114NT1G Package WDFN6 (Pb-Free) Shipping 3000/Tape & Reel
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq [2 oz] including traces). 2. Surface Mounted on FR4 Board using the minimum recommended pad size of 30 mm2, 2 oz Cu.
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. Publication Order Number: NTLJS4114N/D
(c) Semiconductor Components Industries, LLC, 2006
1
November, 2006 - Rev. 1
NTLJS4114N
THERMAL RESISTANCE RATINGS
Parameter Junction-to-Ambient - Steady State (Note 3) Junction-to-Ambient - t 5 s (Note 3) Junction-to-Ambient - Steady State Min Pad (Note 4) Symbol RqJA RqJA RqJA Max 65 38 180 C/W Unit
3. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq [2 oz] including traces). 4. Surface Mounted on FR4 Board using the minimum recommended pad size (30 mm2, 2 oz Cu).
MOSFET ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise noted)
Parameter OFF CHARACTERISTICS Drain-to-Source Breakdown Voltage Drain-to-Source Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-to-Source Leakage Current ON CHARACTERISTICS (Note 5) Gate Threshold Voltage Negative Gate Threshold Temperature Coefficient Drain-to-Source On-Resistance VGS(TH) VGS(TH)/TJ RDS(on) VGS = 4.5 V, ID = 2.0 A VGS = 2.5 V, ID = 2.0 A VGS = 1.8 V, ID = 1.8 A Forward Transconductance gFS VDS = 16 V, ID = 2.0 A CHARGES, CAPACITANCES AND GATE RESISTANCE Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge Threshold Gate Charge Gate-to-Source Charge Gate-to-Drain Charge Gate Resistance SWITCHING CHARACTERISTICS (Note 6) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time td(ON) tr td(OFF) tf VGS = 4.5 V, VDD = 15 V, ID = 2.0 A, RG = 3.0 W 5 9 20 4 ns CISS COSS CRSS QG(TOT) QG(TH) QGS QGD RG VGS = 4.5 V, VDS = 15 V, ID = 2.0 A 650 VGS = 0 V, f = 1.0 MHz, VDS = 15 V 115.5 70 8.5 0.6 0.9 2.1 3.0 W 13 nC pF VGS = VDS, ID = 250 mA 0.4 0.55 3.18 20.3 25.8 35.2 8 35 45 55 S 1.0 V mV/C mW V(BR)DSS V(BR)DSS/TJ IDSS IGSS VGS = 0 V, ID = 250 mA ID = 250 mA, Ref to 25C TJ = 25C TJ = 85C 30 20 1.0 10 100 nA V mV/C mA Symbol Test Conditions Min Typ Max Unit
VDS = 24 V, VGS = 0 V
VDS = 0 V, VGS = 12 V
DRAIN-SOURCE DIODE CHARACTERISTICS Forward Recovery Voltage Reverse Recovery Time Charge Time Discharge Time Reverse Recovery Time VSD tRR ta tb QRR VGS = 0 V, dISD/dt = 100 A/ms, IS = 1.0 A VGS = 0 V, IS = 2.0 A TJ = 25C TJ = 85C 0.71 0.58 14 8.0 6.0 5.0 nC 35 ns 1.2 V
5. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2%. 6. Switching characteristics are independent of operating junction temperatures.
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NTLJS4114N
TYPICAL PERFORMANCE CURVES (TJ = 25C unless otherwise noted)
7 6 ID, DRAIN CURRENT (A) 5 1.4 V 4 3 1.3 V 2 1 0 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 VDS, DRAIN-TO-SOURCE VOLTAGE (V) 1.2 V VGS = 1.6 V to 8 V ID, DRAIN CURRENT (A) 1.5 V TJ = 25C 6 8 VDS 10 V
4 TJ = 25C 2 TJ = 100C 0 0 0.5 1 TJ = -55C 1.5 2 2.5 3
VGS, GATE-TO-SOURCE VOLTAGE (V)
Figure 1. On-Region Characteristics
RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) RDS(on), DRAIN-TO-SOURCE RESISTANCE (W)
Figure 2. Transfer Characteristics
0.03 VGS = 4.5 V 0.025 TJ = 100C
0.05 TJ = 25C 0.04 VGS = 1.8 V VGS = 2.5 V
0.02
TJ = 25C
0.03
0.015
TJ = -55C
0.02 VGS = 4.5 V 0.01 0
0.01 0.005 1.0
1.5
2.0 ID, DRAIN CURRENT (A)
2.5
3.0
1
2
3
4
5
6
ID, DRAIN CURRENT (A)
Figure 3. On-Resistance versus Drain Current
Figure 4. On-Resistance versus Drain Current and Gate Voltage
100000
RDS(on), DRAIN-TO-SOURCE RESISTANCE (NORMALIZED)
1.6 ID = 2 A VGS = 4.5 V 1.4
TJ = 150C IDSS, LEAKAGE (nA)
1.2
VGS = 0 V 10000
1.0
0.8 0.6 -50 1000 2
TJ = 100C
-25
0
25
50
75
100
125
150
4
6
8
10
12
14
16
18
20
TJ, JUNCTION TEMPERATURE (C)
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
Figure 5. On-Resistance Variation with Temperature
Figure 6. Drain-to-Source Leakage Current versus Voltage
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NTLJS4114N
TYPICAL PERFORMANCE CURVES (TJ = 25C unless otherwise noted)
VGS, GATE-TO-SOURCE VOLTAGE (VOLTS) 5 QT 4 VDS QGD QGS VGS 20 VDS , DRAIN-TO-SOURCE VOLTAGE (VOLTS)
1600 C, CAPACITANCE (pF)
VDS = 0 V VGS = 0 V TJ = 25C Ciss
16
1000
3
12
2
8
400
Coss Crss
1 0 0 ID = 2 A TJ = 25C 8 4 QG, TOTAL GATE CHARGE (nC)
4 0
-200 5 VGS 0 VDS 5 10 15 20 25 30
GATE-TO-SOURCE OR DRAIN-TO-SOURCE VOLTAGE (V)
Figure 7. Capacitance Variation
1000 IS, SOURCE CURRENT (AMPS) VDD = 15 V ID = 3.0 A VGS = 4.5 V t, TIME (ns) 100
Figure 8. Gate-To-Source and Drain-To-Source Voltage versus Total Charge
4 VGS = 0 V TJ = 25C 3
td(off) tf tr td(on)
2
10
1
1 1 10 RG, GATE RESISTANCE (OHMS) 100
0 0.3
0.4
0.5
0.6
0.7
0.8
VSD, SOURCE-TO-DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation versus Gate Resistance
Figure 10. Diode Forward Voltage versus Current
100 See Note 2 on Page 1 I D, DRAIN CURRENT (AMPS) 10 ms 10 100 ms 1 ms 1 SINGLE PULSE TC = 25C TJ = 150C RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT 0.1 10 ms
0.1
dc 100
0.01
10 1 VDS, DRAIN-TO-SOURCE VOLTAGE (V)
Figure 11. Maximum Rated Forward Biased Safe Operating Area
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NTLJS4114N
TYPICAL PERFORMANCE CURVES (TJ = 25C unless otherwise noted)
EFFECTIVE TRANSIENT THERMAL RESISTANCE 1000
100 D = 0.5 0.2 0.1 10 0.05 0.02 0.01 1 SINGLE PULSE 0.1 0.000001 0.00001 0.0001 0.001
P(pk)
See Note 2 on Page 1 D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t1 TJ(pk) - TA = P(pk) RqJA(t) 10 100 1000
t1
t2 DUTY CYCLE, D = t1/t2 0.01 t, TIME (s) 0.1 1
Figure 12. Thermal Response
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NTLJS4114N
PACKAGE DIMENSIONS
WDFN6 2x2 CASE 506AP-01 ISSUE B
D A B
NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.20mm FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. 5. CENTER TERMINAL LEAD IS OPTIONAL. TERMINAL LEAD IS CONNECTED TO TERMINAL LEAD # 4. 6. PINS 1, 2, 5 AND 6 ARE TIED TO THE FLAG. STYLE 1: PIN 1. DRAIN 2. DRAIN 3. GATE 4. SOURCE 5. DRAIN 6. DRAIN DIM A A1 A3 b b1 D D2 E E2 e K L L2 J J1 MILLIMETERS MIN MAX 0.70 0.80 0.00 0.05 0.20 REF 0.25 0.35 0.51 0.61 2.00 BSC 1.00 1.20 2.00 BSC 1.10 1.30 0.65 BSC 0.15 REF 0.20 0.30 0.20 0.30 0.27 REF 0.65 REF
PIN ONE REFERENCE
2X
0.10 C
2X
0.10 C 0.10 C
7X
0.08 C D2
6X
L
1 3
E2
NOTE 5
K
mCool is a trademark of Semiconductor Components Industries, LLC (SCILLC).
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative
III III III
A3 A1
4X
E
A
C e L2 b1
6X
SEATING PLANE
SOLDERING FOOTPRINT*
2.30
6X
1.10
6X
0.10 C A 0.05 C
B
0.43 1 1.25
0.35
0.60 0.35
6
4
b
6X
J J1 BOTTOM VIEW
0.10 C A 0.05 C
B 0.34 0.66
NOTE 3
0.65 PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
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NTLJS4114N/D

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